Noise isolation between unrelated circuits on an integrated circuit (IC) is highly desirable. This is particularly true when analog and digital circuits are on the same IC. Analog circuits are often processing minimal signals (&lt;10 mV) and cannot tolerate interference generated by digital circuits on the same IC. FIG. 1 illustrates one of the mechanisms of coupling between separate functions on the same IC.
When digital circuitry 10 switches between high and low states, the change in the inputs and outputs of digital circuitry 10 create current impulses into the common substrate 15 via capacitor C2. Capacitor C2 represents multiple capacitors that are each associated with transistors within digital circuitry 10. The transistors are used to construct logic devices, such as inverters, NOR gates and AND gates. The current impulses flow through substrate 15 through resistors R1, R2 and R3 into ground connections 20, 25 of the IC.
The current flow through resistors R1, R2 and R3 causes voltage noise that is coupled to analog circuitry 30 through capacitor C1. This noise coupling mechanism causes noise within analog circuitry 30 which limits the minimal signal voltage that can be processed by analog circuitry 30 when provided on the same IC as digital circuitry 10.
The distribution of the current flow, and hence the amount of coupled noise, is dependent on the values of R1, R2 and R3. When RI is large and R3 is small relative to each other, the majority of current will flow through R2 and the noise is isolated from coupling to analog circuitry 30 by the effective voltage divider R3/(R1+R3). As R1 is decreased relative to R2 and R3, more noise voltage is coupled to analog circuitry 30. This typically occurs when substrate 15 is an epitaxial substrate that is used for IC processing.
Currently, two basic substrate architectures exist for standard CMOS processing: bulk substrate wafers and epitaxial layered wafers. Bulk substrate wafers consist of silicon that is uniformly doped to a constant carrier concentration. Epitaxial layered wafers have a base that is a heavily doped layer and a lightly doped epitaxial layer. The light doping of the epitaxial layer emulates the surface background carrier concentration similar to that of the bulk substrate wafers. The heavily doped layer provides a low impedance connection (R1), and thus more severe noise coupling, between analog circuitry 30 and digital circuitry 10.
Many alternatives exist to decrease the noise coupling through a common substrate. One alternative is to manufacture digital and analog circuits on separate ICs. This adds cost due to separate packaging and increased pin counts. Another alternative utilizes special processing steps, such as dielectric or junction isolation, that physically isolate unrelated circuits. However, these steps are costly compared to standard CMOS processes. Other alternatives rely on circuit design techniques, such as current-mode logic, or spacing of the unrelated circuits, but circuit noise isolation is still difficult to achieve using these alternatives.